IBM POWER7 multicore server processor

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Citation: B. Sinharoy, R. Kalla, W. J. Starke, H. Q. Le, R. Cargnoni, J. A. Van Norstrand, B. J. Ronchetti, J. Stuecheli, J. Leenstra, G. L. Guthrie, D. Q. Nguyen, B. Blaner, C. F. Marino, E. Retter, P. Williams (2011/05) IBM POWER7 multicore server processor. IBM Journal of Research and Development (RSS)
DOI (original publisher): 10.1147/JRD.2011.2127330
Semantic Scholar (metadata): 10.1147/JRD.2011.2127330
Sci-Hub (fulltext): 10.1147/JRD.2011.2127330
Internet Archive Scholar (search for fulltext): IBM POWER7 multicore server processor
Download: https://ieeexplore.ieee.org/document/5757896
Tagged: Computer Science (RSS) computer architecture (RSS)

Summary

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Theoretical and Practical Relevance

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Elsewhere

Problem

  • Improve socket-level, core-level, and thread-level performance over POWER6.
  • Place 4 times as many cores in each socket => reduce core area and power.
  • Use same socket as POWER6.
  • Remove external L3.

Summary